DUKE UNIVERSITY
Department of Electrical and Computer Engineering
ECE 52 Lab 1

  • Lab report due date: The date you start your next lab exercise (i.e., lab 2)
  • NOTE: Part-B and pre-lab for Part-C must be shown to your TA at the beginning of the second session
Lab Objectives
 The objective of this lab exercise is to continue the student's introduction to the various instruments and components available in the digital systems design lab.

Additionally, the student is introduced to industrial grade computer-aided-design (CAD) tools used in the design, simulation and synthesis of digital circuits and systems.
Part-A
 Using the specially designed breadboard provided in the lab, and the TTL IC part 74LS10 (3-input NAND gate), place this part on the breadboard as instructed and connect the breadboard to the power supply.

With the NAND gate powered, perform the following measurements and observations:
  1. Physical (i.e., electrical) and Logical Measurements:

    1. Using the 74LS10 NAND gate, apply all possible input signals(i.e., 000, 001, ..., 111) and measure the input and corresponding output voltages using the multimeter and record their values. Verify its NAND function.

    2. Using the Oscilloscope, observe the output of the NAND gate when two of its inputs are set to logical level "1" and the third is connected to the square wave generator.  Estimate the rise and fall times of the observed waveform.            

    3. Crank up the frequency of the square wave generator - is there a point where the behavior degrades? Disconnect it and leave it "floating" and record the resulting. NOTE: The oscilloscope has a convenient "Autoscale" button that works for clean input signals- as you approach high input signal frequencies, the output signal won't be so clean anymore. Establish a good scale with the autoscale button at low frequencies and then use the "Time Div" knob to adjust your time base as you increase the signal frequency.

    4. Remove the square wave generator in Part(ii) above, and apply first a logical "1" to it and record the output; then output. Any comment?
Part-B This part of the experiment involves introduction to the Quartus II CAD tools.
You may work on part B during the scheduled lab time to obtain help from the TAs or do it on your own time. Everyone should run through the tuturials for themselves (i.e., don't have just one member of a group learn Quartus!).

Quartus II is a sophisticated CAD system, and it will be utilized in most of our lab experiments as well as in several of our homework assignments. You are asked to review Tutorial-1 in the Appendix B of your text, and to familiarize yourself with  Quartus II.

The CD available with your text provides these CAD tools, and they should be installed on your personal computer for easy access. They are also available on several of the PCs in the laboratory.
Part-C

Pre-lab for Part-C:
(15% of this lab): Use Quartus to simular a NAND-only implementation of the full adder.


1. One-bit Full Adder:

  1. Design a 1-bit Full Adder using only NAND gates. Derive its "Sum bit" and "Carry" functions and express them in canonical NAND/NAND forms. The NAND gates to be used are 3-input NAND gates. Implement the circuit and check its logical behavior to verify its correctness. The TA will assist you in hooking up DIP switches to act as inputs and LEDs to act as outputs. Use the Logic Analyzer to check the behavior of the circuit. 

2. Inter-operability:

  1. Connect your full adder with three other groups' full adders to perform the calculation 5+13 (0101 + 1101).
Lab Report
 The write-up (for parts A & C in this case) for this report should include:

           # Title page with: Your Name, Title of the Experiment, Date
           # The Lab Handout
           # The logic equations and all circuit diagrams used
           # Tabulate all your measurements including truth tables    
           # The schematics and waveform traces well documented for all
             simulations  
           # Comment  on your measurements and observations.  
           # Concluding remarks