Usual caveats about free research software here. (and no liability on my part if you use it!)

Semi-empirical (data-driven) device modeling for rapid prototyping
iv-SPICE: Semi-empirical device modeling with SPICE 3f5

Silicon nanorod design tool- zip archive (1.3 MB)
I used this tool to layout the circuitry for my dissertation at UNC-Chapel Hill. Many of the circuits can be found in the archive, along with a brief "readme.pdf", source code, including some animation code.
... good luck! (it's not exactly user friendly or intuitive)

RG-FET PISCES-IIB simulation input/helpers- zip archive (71 MB)
       This is an archive of the PISCES-IIB input decks and helper programs for simulating cylindrical FETs and
        generating table formatted IV data for iv-SPICE.

DNA-Nanorod assembly processing tool- zip archive (3.5 MB)
A tool to render a silicon nanorod design into a sequence of DNA binding events. That is, this tool creates an ordering of rods (by type and DNA sequence identifier) for the circuit. The format for the circuit file is identical to the output from the nanorod design tool above. The same warnings apply from above... good luck!

DNA-CNT manual layout tool- tar.gz archive (60.9 kB)
This tool can be used to generate carbon nanotube / DNA grid layout. Some simple help text is included. NOTE: this is only the source
and you must have a gcc build environment with various library components (see source).

DNA-CNT cell library- tar.gz archive (280 kB)
These layouts were generated by the manual DNA-CNT layout tool (see above). The layout tool can use them to compose larger circuits and extract netlists for simulation (with the modified SPICE kernel).


  • If you find these tools (or library) useful in your research, when you publish please cite one of the following references: 
     The Design of DNA Self-Assembled Computing Circuitry
        C. Dwyer, L. Vicci, J. Poulton, D. Erie, R. Superfine, S. Washburn, R. M. Taylor.
        IEEE Trans. on VLSI, vol. 12, 1214-1220, November 2004.
    OR 
     DNA Self-assembled Parallel Computer Architectures
        C. Dwyer, J. Poulton, R. M. Taylor, L. Vicci.
        Nanotechnology, vol. 15, 1688-1694, October 2004.
    • OR 
     Performance Simulation of Nanoscale Silicon Rod Field-Effect Transistor Logic
        C. Dwyer, R. M. Taylor, L. Vicci.
        IEEE Trans. on Nanotechnology, 2(2), 69-74, 2003.
    OR
     Design Tools for a DNA-guided Self-assembling Carbon Nanotube Technology
        C. Dwyer, V. Johri, M. Cheung, J. Patwardhan, A. Lebeck, D. Sorin.
        Nanotechnology, vol. 15, 1240-1245, September 2004.

    Thanks, and good luck!

    Chris Dwyer, 2004-06