ECE 299.03 Topics in Nanocomputers

Class Schedule (Subject to change at anytime during semester)

You should read the papers with numbers, the bulleted items are additional readings, but not required.

Date
Topic Presenter
Readings
1/12
Introduction
Dwyer
None
1/17
Nanocomputing Overview Dwyer
  1. Richard Feynman's Lecture at Caltech, 1959
  2. The Future of Nanocomputing, George Bourianoff, IEEE Computer, 36, 8, Aug 2003, 44-53
  3. The Art of Building Small, G. M. Whitesides, J. C. Love, Scientific American, September, 2001, 38-47
  4. Less is More in Medicine, A. P. Alivisatos, Scientific American, September, 2001, 67-73
  5. The Incredible Shrinking Circuit, C. M. Lieber, Scientific American, September, 2001, 59-64
  6. Plenty of Room, Indeed, M. Roukes, Scientific American, September, 2001, 48-57

Additional Readings

1/19 Nanoscale Devices Overview
C. Harting
  1. Overview of Nanoelectronic Devices, D. Goldhaber-Gordon, M. S. Montemerlo, J. C. Love, G. J. Opiteck, J. C. Ellenbogen, Proceedings of the IEEE, 85, 4, 1997, 521-540
1/24

Carbon Nanotube &
Silicon Nanowires FETs

L. Campos
  1. Logic Circuits with Carbon Nanotube Transistors, Adrian Bachtold, P. Hadley, T. Nakanishi, C. Dekker, Science, 294, 2001, 1317-1320
  2. Logic Gates and Computation from Assembled Nanowire Building Blocks, Y. Huang, et al., Science, 294, 2001, 1313-1317
  3. Carbon Nanotube-Based Nonvolatile Random Access Memory for Molecular Computing, T. Rueckes, K. Kim, E. Joselevich, G. Y. Tseng, C. Cheung, C. M. Lieber, Science, 289, 2000, 94-97

Additional Readings

1/26
Proposal Work Day
1/31
Molecular Electronics W. Fleming
  1. Nanocell Logic Gates for Molecular Computing, J. M. Tour, W. L. Van Zandt, C. P. Husband, S. M. Husband, L. S. Wilson, P. D. Franzon, D. P. Nackashi, IEEE Transactions on Nanotechnology, 1, 2, Jun 2002, 100-109
  2. Logic and Memory with Nanocell Circuits, C. P. Husband, S. M. Husband, J. S. Daniels, J. M. Tour, IEEE Transactions on Electron Devices, 50, 9, 2003, 1865-1875

Additional Readings

2/2
Molecular Electronics  
R. Koutsoyannis
  1. Electronically Configurable Molecular-Based Logic Gates, C. P. Collier, E. W. Wong, M. Belohradsky, F. M. Raymo, J. F. Stoddart, P. J. Kuekes, R. S. Williams, J. R. Heath, Science, 285, Jul 1999, 391-394
  2. Large On-Off Ratios and Negative Differential Resistance in a Molecular Electronic Device, J. Chen, M. A. Reed, A. M. Rawlett, J. M. Tour, Science, 286, 1999, 1550
  3. A 160-kilobit molecular electronic memory patterned at 10^11 bits per square centimetre, Jonathan E. Green, Jang Wook Choi, Akram Boukai, Yuri Bunimovich, Ezekiel Johnston-Halperin,
    Erica DeIonno, Yi Luo, Bonnie A. Sheriff, Ke Xu, Young Shik Shin, Hsian-Rong Tseng, J. Fraser Stoddart & James R. Heath, Nature, 445, 2007, 414-417.
2/7
Self-Assembly & DNA  A. Wise
  1. Design and Self-Assembly of Two-Dimensional DNA Crystals, E. Winfree, F. Liu, L. A. Wenzler, N.C. Seeman, Nature, 394, 1998, 539-544
  2. Directed Assembly of One-dimensional Nanostructures into Functional Networks, Y. Huang, X. Duan, Q. Wei, C. M. Lieber, Science, 291, 2001, 630-633
  3. DNA in a Material World, N.C. Seeman, Nature, 421, 2003, 427
  4. Folding DNA to create nanoscale shapes and patterns, P. W. K. Rothemund, Nature, 440, 2006, 297-302

Additional Readings

2/9
DNA-Computing
Y. Liu
  1. Molecular Computation of Solutions to Combinatorial Problems, L. Adleman, Science, 266, 5187, 1994, 1021-1024
  2. Circuits and Programmable Self-Assembling DNA Structures, A. Carbone, N. C. Seeman, Proceedings of the National Academy of Sciences, 99, 20, 2002, 1-6
2/14
DNA + Ring Gated FET
Dwyer
  1. The Design of DNA Self-Assembled Computing Circuitry, C. Dwyer, L. Vicci, J. Poulton, D. Erie, R. Superfine, S. Washburn, R. M. Taylor, IEEE Transactions on VLSI, 2004
  2. Selective Functionalization of Arbitrary Nanowires, K. Skinner, C. Dwyer, S. Washburn, Nano Letters, 6, 12, 2006, 2758-2762
  3. DNA Functionalized Single-Walled Carbon Nanotubes, C. Dwyer, M. Guthold, M. Falvo, S. Washburn, R. Superfine, D. Erie, Nanotechnology, 13, 2002, 601-604
  4. Self-assembled Architecture and the Temporal Aspects of Computing, C. Dwyer, A. Lebeck, D. Sorin, IEEE Computer, 38, 2005, 56-64

Additional Readings
  • Self-assembled Carbon Nanotube Circuitry, (abstract only, sorry!) C. Dwyer, M. Guthold, D. Erie, R. Superfine, R. Taylor, S. Washburn, Proc. 67th Southeastern Section of the American Physical Society (SESAPS), 2000.
2/16
NanoFabrics
V. Mao
  1. NanoFabrics: Spatial Computing Using Molecular Electronics, S. C. Goldstein, M. Budiu, Proceedings of the 28th Annual International Symposium on Computer Architecture, Jul 2001, 178-191
2/21 Quantum
S. Smith
  1. Toward Quantum Computation: A Five-qubit Quantum Processor, M. Steffen, L. M. K. Vandersypen, I. L. Chuang, IEEE Micro, 21, Mar 2001, 24-34
  2. A Practical Architecture for Reliable Quantum Computers, M. Oskin, F. T. Chong, I. Chuang, IEEE Computer, Jan 2002, 79-87

Additional Reading

2/23
Project Proposal Presentations
2/28
Project Proposal Presentations
3/2
Defect Tolerance
B. Romanescu
  1. A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology, J. R. Heath, P. J. Kuekes, G. S. Snider, R. S. Williams, Science, 280, 1998, 1716-1721
  2. A Defect- and Fault-Tolerant Architecture for Nanocomputers, Jie Han, Pieter Jonker, Nanotechnology, 14, Jan 2003, 224-230
  3. Fault-Tolerant Techniques for Nanocomputers, K. Nikolic, A. Sadek, M. Forshaw, Nanotechnology, 13, 2002, 357-362
  4. Designing MRF based error correcting circuits for memory elements, Nepal, K., Bahar, R. I., Mundy, J., Patterson, W. R., and Zaslavsky, A., Proceedings of the Conference on Design, Automation and Test in Europe, 2006, 792-793.
3/7
DNA + CNFET
C. Harting
  1. NANA: A Nanoscale Active Network Architecture, J. P. Patwardhan, C. Dwyer, A. R. Lebeck, D. J. Sorin, ACM JETC, 2, 1, 2006, 1-30
  2. A Defect Tolerant Self-organizing Nanoscale SIMD Architecture, J. P. Patwardhan, V. Johri, C. Dwyer, A. R. Lebeck, Proc. 12th ASPLOS, 2006, 241-251
3/9
SET, PIP, and WISP
L. Campos
  1. Systolic Processor Designs Using Single-Electron Digital Circuits, M. G. Ancona, Superlattices and Microstructures, 20, 4, 1996
  2. The Use of Nanoelectronic Devices in Highly-Parallel Computing Systems, T. J. Fountain, M. J. B. Duff, D. G. Crawley, C. D. Tomlinson, C. D. Moffat, IEEE Transactions on VLSI Systems, 6, 1, 1998, 31-38
  3. Wire-Streaming Processors on 2-D Nanowire Fabrics, T. Wang, M. Ben-Naser, Y. Guo and C. Andras Moritz, Technical Proceedings of the 2005 NSTI Nanotechnology Conference and Trade Show, 2005, 619-622
3/14
Spring Break
3/16
Spring Break
3/21
Project Work Day 
3/23
Project Work Day
3/28 Cellular Automata W. Fleming
  1. Quantum Cellular Automata, C. S. Lent, P. D. Tougaw, W. Porod, G. H. Bernstein, Nanotechnology, 4, 1993, 49-57
  2. Exploring and Exploiting Wire-Level Pipelining in Emerging Technologies, M. T. Niemier, P. M. Kogge, Proceedings of the 28th Annual International Symposium on Computer Architecture, Jul 2001, 166-170
  3. Eliminating Wire Crossings for Molecular Quantum-dot Cellular Automata Implementation, A. Chaudhary, D.Z. Chen, X.S. Hu, M.T. Niemier, R. Ravichandran, K. Whitton, in Proceedings of International Conference on Comp. Aided Design (ICCAD), Nov. 2005, 565-571
3/30 Cellular Automata R. Koutsoyannis
  1. Laying Out Circuits on Asynchronous Cellular Arrays: A Step Towards Feasible Nanocomputers, F. Peper, J. Lee, S. Adachi, S. Mashiko, Nanotechnology, 14, 4, 2003, 469-485
  2. Fault-tolerance in Nanocomputers: a Cellular Array Approach, F. Peper, J. Lee, F. Abo, T. Asokawa, S. Adachi, N. Matsui, S. Mashiko, IEEE Trans. on Nanotechnology, Mar 2004, 187-201
  3. Online Marking of Defective Cells by Random Flies, T. Isokawa, S. Kowada, F. Peper, N. Kamiura, N. Matsui, Lecture Notes in Computer Science, Cellular Automata, 2006, 347-356
4/4
Molecular
Electronics
Y. Liu
  1. Molecular electronics: Some views on transport junctions and beyond, C. Joachim, M. Ratner, Proc. of the National Academy of Sciences, 102, 2005, 8801-8808
  2. A Single-molecule Diode, M. Elbing, R. Ochs, M. Koentopp, M. Fischer, C. von Hanisch, F. Weigend, F. Evers, H.B. Weber, M. Mayor, The Proceedings of the National Academy of Sciences, 102, 2005, 8815-8820
4/6 Molecular Electronics
V. Mao
  1. Architectures for Molecular Electronic Computers: 1. Logic Structures and an Adder Designed from Molecular Electronic Diodes, James C. Ellenbogen, J. Christopher Love, Proceedings of the IEEE, 88, 3, Mar 2000, 386-426
  2. Toward Nanocomputers, Greg Y. Tseng, James C. Ellenbogen, Science, 294, Nov 2001, 1293-1294
  3. Electronics Using Hybrid-Molecular and Mono-Molecular Devices, C. Joachim, J. K. Gimzewski, A. Aviram, Nature, 408, Nov 2000, 541-548
4/11 Protein Computers & DNA Logic
S. Smith
  1. Amorphous Computing, H. Abelson, D. Allen, D. Coore, C. Hanson, G. Homsy, T. F. Knight, R. Nagpal, E. Rauch, G. J. Sussman, R. Weiss, Communications of the ACM, 43, 5, 2000, 74-82
  2. Directed evolution of a genetic circuit, Y. Yokobayashi, R. Weiss, F. H. Arnold, Proc. of the National Academy of Sciences, 99, 2002, 16587-16591
  3. A Synthetic Multicellular System for Programmed Pattern Formation, S. Basu, Y. Gerchman, C.H. Collins, F.H. Arnold, R. Weiss, Nature, 434, 2005, 1130-1134
  4. Enzyme-free Nucleic Acid Logic Circuits, G. Seelig, D. Soloveichik, D.Y. Zhang, E. Winfree, Science, 314, 2006, 1585-1588.
4/13 Nanowire Arrays
B. Romanescu
  1. Array-Based Architecture for FET-Based, Nanoscale Electronics, A. DeHon, IEEE Transactions on Nanotechnology, 2, 1, 2003, 23-32
  2. Nanowire Crossbar Arrays as Address Decoders for Integrated Nanosystems, Z. Zhong, D. Wang, Y. Cui, M. W. Bockrath, C. M. Lieber, Science, 302, 2003, 1377-1379
  3. Radial addressing of nanowires, J. E. Savage, E.  Rachlin, A. DeHon, C. M. Lieber, Y. Wu, ACM JETC, 2, 2, 2006, 129-154

Additional Reading

4/18 Project Work Day

4/30 9am to 12 noon Final Project Presentations